We are recruiting a Manager for a newly formed ASIC and IP Design Department in PDU Compute and Digital Silicon in Kista, Sweden.
The Digital ASIC and FPGA sector delivers ASIC and FPGA solutions to PDU Radio and PDU Compute and Digital Silicon for Baseband, Street Macro and Radio devices. We want to enhance the management capacity in the Kista ASIC and IP Design Department.
This Department consists of approximately 120 R&D professionals divided in two IP Design sections (1-2), a virtual development platform section, an ASIC backend and integration section and an ASIC top level verification section. We are now looking for a section line manager for ASIC Back End and Integration section. The teams work as an integral part of Ericsson’s global digital ASIC/FPGA development muscle consisting of approximately 600 R&D professionals in total.
You, as section leader for Backend and Integration, are expected to teach, coach, challenge and develop individuals and foster an innovative and learning culture. You are also responsible for developing and executing team strategies and plans based on the overall goals and strategies of the Kista ASIC and IP Design Department, and the Digital ASIC and FPGA sector. You will focus on the whole flow from idea generation to product, and continuously improve and evolve the ways of working.
Also, as a section leader, you will be expected to work in the global context with your peers from Austin and Lund and provide additional support to ensure programs are executing to schedule, scope, and meeting their project expectations.
Furthermore, you are expected to:
• Strategically evolve the ASIC development operations by participating in the Kista ASIC and IP Design Department leadership team and closely co-operate within the global Digital ASIC and FPGA sector leadership team and stakeholders
• Be part of fostering a motivating, customer oriented, and challenging work environment
• Contribute to drive internal efficiency, cost effectiveness via new- or alignment of existing ways of working
• Identify and drive opportunities to improve through sound change management techniques
• Actively and proactively support ongoing projects and participate in Digital ASIC and FPGA reference groups meetings
• You will be part of the digital ASIC/FPGA leadership team and support the Kista ASIC and IP Design Department head to ensure good cross-sector cooperation and growth in the digital ASIC/FPGA area
The person in this position will report to the Department Head of Digital ASIC and IP Design based in Kista, Sweden.
• Technical education at a university level is required. M.Sc. in Electrical Engineering or Engineering Physics or similar and well documented leadership skills are required
• Several years of experience within R&D organizations as a leader (line manager and/or project manager) from ASIC development projects
• Good understanding of an ASIC project and its phases, both frontend and backend
• Experience of working with external suppliers
• Understanding of ASIC process technology
• Knowledgeable of EDA tools, preferable within the area of synthesis, static timing analysis, power analysis, equivalence checking etc.
• Integration of internal and external IP
• You are analytical, structural and result oriented. You will find creative solutions when lacking information and act outside your formal area of responsibility when needed
• Strong technical leadership skills, able to understand, support and challenge the technical issues facing your team of product developers
• Ability to find and drive continuous improvement work
• A genuine interest in people
• Strong communication skills and a good relationship builder
• Large degree of flexibility and willingness to take on different tasks
• Excellent written and oral communications skills in English
• Business and customer focused with a high accountability to deliver results
• Strong experience in development initiatives in multi-site organizations or projects
This position will be located in Kista Sweden.
Application process: Welcome to apply with resume in English.
Please send in your application in English as soon as possible since the process is ongoing.
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Primary country and city: Sweden (SE) || || Stockholm || IT
Req ID: 307643