ASIC verification engineer for radio applications - Developer
The unit you will work within - Digital Radio Implementation unit and the position will be based in Kista, Stockholm.
The Digital Radio Implementation unit is one of several units responsible for the development of new radio hardware units, which are a part of Ericsson's base stations development for GSM, WCDMA, LTE, 5G and future standards. The main responsibility for the team is the antenna near signal processing blocks implemented in ASICs, FPGAs and/or structured ASICs.
You will work in the collaborative, diverse and dynamic radio algorithm ASIC/FPGA verification team.
The goal of the verification task is to verify that the functional requirements of the radio algorithm design blocks are fulfilled before tape-out of the ASIC or release of the FPGA.
The work will include:
- Verification planning
- Verification specification
- Verification environment (creation/adaptation/maintenance).
- Test case creation
- Usage of uVC´s
- Development of uVC´s (if needed)
- Usage of reference models (if needed)
- Constrained random testing
- Creation of Coverage matrix
- Writing Verification Report
- Most of the verification tests use constrained random methodology but dedicated test-vectors and assertions are also used.
You, as the successful candidate:
This is a great opportunity for you who has graduated from the University with a Master degree or PhD in electrical engineering or engineering physics. The successful candidate also has a couple of years of experience within the field of IP module verification experience in System Verilog with the UVM methodology, after graduation.
You should have a good understanding and knowledge about hardware (HW) designs, which also are key factors, since you will be verifying digital signal processing implementations for the global digital radio solutions in radio base stations.
Both written and spoken English skills are required. You have a positive attitude and an eagerness to learn, cooperate and assist your follow engineers. You have a structured way of working, care with details and a natural talent in communicating with others.
Furthermore, enjoy working both independently and in a small team (using Scrum, Agile and Lean ways of working) and you are focused on reaching the end result on time. As a person you must be thorough and able to work with many different people. The work will be carried out in close cooperation with RTL designers.
A Master’s Degree, or PhD, in electrical engineering, engineering physics or similar work experience.
- Proven competence of ASIC verification and experience with test bench development
- Knowledge of System Verilog (SV), VHDL and Object-Oriented Programming concepts
- Experience with simulation verification tools (Mentor/Cadence)
- Experience in Formal Verification
- Experience in developing block level and sub-system level test benches using UVM/OVM methodology
- Experience with version control systems
- Ability to express ideas and communicate effectively in English
- A good team player with a high level of pro-activity, initiative and problem solving
- Experience in system level verification
- Programming skills (Matlab, SystemC, Tcl, Python, C/C++…).
- Competence within the field of signal processing, telecommunication and radio technology
- Knowledge of generic radio building blocks
- Knowledge about processor architectures
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Primary country and city: Sweden (SE) || || Stockholm || IT; R&D
Req ID: 284080