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Involve in and finish task in Baseband FPGA design , verification or lab test .
1.Be responsible for specific tasks Baseband FPGA design and verification, lab test under mentors’ guide.
2.Be responsible for related documentation of requirement, architecture, design and verification specification under mentors’ guide.
Qualifications & Requirements:
1. At least one year experience in FPGA/ Logic design, graduated from Telecommunication, computing or related majors. Good telecommunication theory background.
2. basic Verilog / VHDL /C program skill .
3. basic understand digital board design, debugging and FPGA
4. Be good at English, reading, writing, speaking and listening.
5. Good sense of co-working with team members
6. Be familiar with FPGA interface function and logic, high speed SERDES, parallel bus interfaces, serial bus interfaces is a plus.
7. Linux environment working capable is a plus; knowledge of script/Shell is a plus.