ASIC Design Verification Engineer

Job Description

Date: Sep 20, 2019

Ericsson is pleased to announce the grand opening of our brand new ASIC/SoC design center deep in the heart of Texas.  We chose Austin, TX for Ericsson's very first US silicon design center and we're building our new ASIC design team from scratch.  5G is the future of communications and this new team is creating the silicon that will ensure networks have the processing power to deliver on the promises of a connected society.


Would you like to work with the latest and greatest FinFET technology?  Think it would be cool to engineer the silicon engine that will enable self-driving cars, smart cities, and all things IoT?  Want to be part of a growing team where you actually know everyone's name?  Do you want to work on amazing things while enjoying a pleasant and happy work/life balance?


Ericsson's ASIC development team will be imagining pre-silicon Digital ASIC and SoC designs for all existing and future mobile standards with an immediate focus on 5G. The development is done in close cooperation with internal and external stake holders including standardization teams, market leading silicon vendors and ASIC Physical Design houses. We are working with the latest, state-of-the-art SI-technologies, EDA tools and methodologies.


Since we're growing this group from the ground up there are a number of current opportunities for Experienced, Creative and Innovative engineers to join this world class team. These roles present a unique opportunity to work and gain competence in several areas such as Block- and Top-Level ASIC and SoC verification, test bench development, HW emulation, HW acceleration, SW driven verification.  Our verificaton engineers are key members of a dynamic, combined design/verification team - with opportunities for learning and trying out new roles and responsibilities plus many other areas to grow.




You have developed test plans and written both directed and randomized test cases to debug RTL.  You have architected/created/written test benches from scratch to debug RTL at the block or top level.  You have a great interest in learning new things every day and want to make a difference. You have a very positive attitude and thrive on new challenges. You are keen to solve problems and do so creatively. Where there is change you see opportunities. You are a strong team player and a very communicative person but you also work well independently. You make sure to reach results with high quality and on time.


Required Skills:


  • ASIC, SoC or FPGA RTL verification
  • At least 5 years of work experience debugging RTL at the block and/or top level
  • Hands-on verification utilizing System Verilog/UVM
  • Architecting/creating RTL test benches from scratch
  • TCL/Python/Perl/etc.
  • Lab-based verification experience
  • Fluent in English, speaking and writing


Preferred Skills:


  • Developing test plans and directed/randomized test cases from scratch
  • C/C++
  • Embedded Software design and test
  • IT Environment like Linux, Clearcase, GIT, LSF
  • Leadership skills


Educational Requirements


  • Master of Science in Electrical Engineering, Computer Engineering or equivalent experience.




DISCLAIMER: The above statements are intended to describe the general nature and level of work being performed by employees assigned to this classification. They are not intended to be construed as an exhaustive list of all responsibilities, duties and skills required of employees assigned to this position. Therefore employees assigned may be required to perform additional job tasks required by the manager.

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Primary country and city: United States (US) ||  || Austin || IT; R&D

Req ID: 212526